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FA3641p(n), fa3647p(n) 58 FA3641p(n), fa3647p(n) pwm control ic with light load power saving function for switching power supply control dimensions, mm sop-8 4.9 3.9 6.0 0.2 0.4 0.1 1.27 0.2 0.20 +0.1 ?.05 0~8 1 4 8 5 1.7max dip-8 1 8 5 4 9.3 6.4 7.62 3.3 4.5max 1.5 3.0min 0 ~ 1 5 ? 0~15 ? 0.46 0.1 2.54 0.25 0.25 + 0 .1 0 .0 5 description the FA3641p(n) and fa3647p(n) are the pwm type switching power supply control ics that can directly drive power mosfet. these ics use a cmos device with high dielectric strength (30v) to implement low power consumption. they feature a number of functions that are equivalent to those of the fa531x series consisting of bipolar devices. in addition, they have a function that reduces the oscillation frequency to suppress loss of the power supply in light load mode and support an overvoltage protection detecting vcc voltage. these ics are most suitable for high-performance, energy-saving power supplies that require low input power in standby or no-load mode. features uses a newly developed cmos process with high dielectric strength (30v) for implementing low power consumption standby current of 2 a or less (at vcc=14v), and operating current of 1.9ma (typ.) automatically reduces the oscillation frequency to suppress loss of the power supply in light load mode overvoltage protection function detecting vcc voltage a drive circuit for connecting a power mosfet directly output peak current: source current 500ma sink current +1a pulse-by-pulse overcurrent limiting function overload cutoff function (latch or non-latch mode selectable) output on/off control function by external signal latch mode overvoltage shutdown function undervoltage lockout function (16.5v on / 9v off) reference voltage output (5v) 8-pin package (dip/sop)
FA3641p(n), fa3647p(n) 59 absolute maximum ratings (ta=25 ? c) i tem symbol test condition rating unit supply voltage v cc 1 low impedance source (icc >15ma) 30 v v cc 2 internal zd clamp (icc < 15ma) self limiting v output peak current i ol sink current +1.0 a i oh source current 0.5 a fb pin input voltage v fb 0.3 to 5.0 v ref pin output current i ref 10 ma is pin input voltage v is 0.3 to 5.0 v cs pin input current i cs 2.0 ma total power dissipation p d at ta =25 ? c dip 800 * 1 mw sop 400 * 2 operating temperature topr 30 to +85 ? c junction temperature t j 125 ? c storage temperature t stg 40 to +150 ? c block diagram FA3641 fa3647 note: * 1 derating factor ta > 25 ? c: 8.0mw/ ? c maximum power dissipation curve * 2 derating factor ta > 25 ? c: 4.0mw/ ? c 30 25 85 125 0 ambient temperature ta [ ? c] max power disspation 400mw (sop) 800mw (dip) pin no. symbol function description 1 rt oscillator timing se tting oscillation frequency resistor 2 fb feedback input to pwm comparator 3 is (+)/ overcurrent input to overcurrent limiting is ( ) detection function 4 gnd ground ground 5 out output output for direct driving a power mosfet 6 vcc power supply power supply for ic 7 ref reference voltage refer ence voltage output (5v) 8 cs soft-start and soft-start, on/off and latch- on/off control mode shutdown operations
FA3641p(n), fa3647p(n) 60 electrical characteristics (vcc=18v, r t =47k ? , ta=25 ? c) reference voltage section oscillator section item symbol test condition min. typ. max. unit oscillation frequency f osc r t =47k ? , tj=25 ? c 92.6 100 107.4 khz frequency variation 1 (voltage stability) f dv v cc =10 to 28v 1.6 % frequency variation 2 (temperature stability) f dt ta= 30 to +85 c 0.02 % / c recommended operating condition item symbol min. typ. max. unit supply voltage v cc 10 28 v ref pin bypass capacitor c ref 0.1 0.47 f soft-start capacitor c s 0.01 1 f oscillation frequency (fb >1.2v) f osc 30 500 khz min.oscillation frequency at light load mode (fb <1.2v) f oscl 10 khz item symbol test condition min. typ. max. unit reference voltage vref tj=25 ? c 4.75 5.00 5.25 v voltage variation 1 (line regulation) v dv v cc= 10 to 28v 6 20 mv voltage variation 2 (load regulation)) v dv i l =0 to 10ma, v cc =18v 6 20 mv voltage variation 3 (temperature stability) v dt ta= 30 to +85 c 0.5 mv/ c pulse width modulation circuit section item symbol test condition min. typ. max. unit fb pin source current i fb v fb =0v 985 750 615 a input threshold voltage (fb pin) v th fbo duty cycle =0% 0.95 1.03 v v th fbm duty cycle = d max 2.40 v maximum duty cycle d max v fb =2.5v 66 70 74 % reducing oscillation frequency section item symbol test condition min. typ. max. unit fb pin threshold voltage v th fbs 1.18 v frequency reduction k f s1 v fb =1.10 to 1.15v 16.7 khz minimum oscillation frequency f osc s2 46 khz overcurrent limiting circuit section item symbol test condition FA3641p/n fa3647p/n unit min. typ. max. min. typ. max. input threshold voltage (is pin) v th is 215 235 255 188 168 148 mv input terminal source current (is pin) i is v is =0v 5 20 a delay time t pd is 150 150 ns soft-start circuit section item symbol test condition min. typ. max. unit charge current (cs pin) i chg v cs =1v, tj=25 ? c 4.0 6.5 9.0 a input threshold voltage (cs pin) v th cso duty cycle =0% 0.95 1.03 v v th csm duty cycle = d max 2.40 v
FA3641p(n), fa3647p(n) 61 output on/off circuit section item symbol test condition min. typ. max. unit cs pinl source current i socs v cs =0v, tj=25 ? c 4.0 6.5 9.0 a off-to-on threshold voltage (cs pin) v th on off on, tj=25 ? c 0.82 0.95 v on-to-off threshold voltage (cs pin) v th off on off, tj=25 ? c 0.50 0.68 v latch-mode cutoff circuit section item symbol test condition min. typ. max. unit cs pin sink current i sics v cs =6.5v, v fb =1v, tj=25 ? c20 35 50 a cutoff threshold voltage (cs pin) v th csf on off, tj=25 ? c 8.0 8.5 9.0 v v th csn off on, tj=25 ? c 7.4 7.9 8.4 v hysteresis v th his 0.6 v overload cutoff circuit section item symbol test condition min. typ. max. unit cutoff threshold voltage (fb pin) v th fb 2.8 3.0 3.3 v overvoltage cutoff circuit section item symbol test condition min. typ. max. unit cutoff threshold voltage (vcc pin) v th vcc tj=25 ? c 303234v cutoff operating supply current (vcc pin) i vcc tj=25 ? c13ma charge current (cs pin) i so cs2 v cs =6.5v 0.5 0.9 1.4 ma undervoltage lockout circuit section item symbol test condition min. typ. max. unit off-to-on threshold voltage v cc on tj=25 ? c 15.5 16.5 17.5 v on-to-off threshold voltage v cc off tj=25 ? c 8.5 9.0 10.0 v hysteresis v hys tj=25 ? c 6.8 7.5 8.2 v output section item symbol test condition min. typ. max. unit l-level output voltage v ol i o =100ma 0.7 1.5 v h-level output voltage v oh i o = 100ma, v cc =18v 15 16.5 v rise time tr out=1000pf 50 ns fall time tf out=1000pf 40 ns overall device item symbol test condition min. typ. max. unit standby current i cc stb v cc =14v 2 a startup current i cc st v cc = v ccon 12 30 a operating-state supply current i cc op no load 1.9 2.5 ma off-state supply current i ccof v cc =17v, cs=0v 100 a cutoff-state supply current i ccl v cc =10v 45 100 a
FA3641p(n), fa3647p(n) 62 characteristic curves (ta=25 ? c) oscillation frequency (fosc) vs. oscillation frequency (fosc) vs. supply voltage (vcc) timing resistor resistance (r t ) oscillation frequency (fosc) vs. l-level output vltage (v ol) vs. supply voltage (vcc) junction temperature (tj) supply current (icc) vs. supply voltage (vcc) supply current (icc) vs. junction temperature (tj) operating mode operating mode v cc = 18v fb = 1.5v 10 1 100 1000 100 10 1000 fosc [khz] rt [k ? ] out = no load rt = 47 k ? fb = open, cs = 3v 15 10 20 25 96 97 98 99 100 105 101 102 103 104 95 fosc [khz] vcc [v] 30 rt = 47k ? fb = 2.5v 0 50 50 100 98 99 100 101 102 103 104 97 105 fosc [khz] tj [ c] 150 io = 100 ma 15 10 20 25 0.2 0.4 0.6 0.8 1 0 v ol [v] vcc [v] 30 rt = 47k ? fb = 0v 15 10 20 25 1.8 1.85 1.9 1.95 2 1.75 icc [ma] vcc [v] 30 rt = 47k ? vcc = 18v fb = 0v 0 50 50 100 1.8 1.85 1.9 1.95 2 1.75 icc [ma] tj [ c] 150
FA3641p(n), fa3647p(n) 63 supply current (icc) vs. supply voltage (vcc) supply current (icc) vs. supply voltage (vcc) latch mode latch mode supply current (icc) vs. supply voltage (vcc) supply current (icc) vs. supply voltage (vcc) off mode off mode uvlo off-to-on thrreshold voltage (vcc on) vs. uvlo on-to-off thrreshold voltage (vcc off) vs. junction temperature (tj) junction temperature (tj) 12 10 14 16 40 80 120 160 200 0 icc [ a] vcc [v] 18 20 15 10 20 25 500 1000 1500 2000 2500 0 icc [ a] vcc [v] 30 3000 12 10 14 16 40 80 120 160 200 0 icc [ a] vcc [v] 18 20 15 10 20 25 500 1000 1500 2000 2500 0 icc [ a] vcc [v] 30 3000 0 50 50 100 16.2 16.4 16.6 16.8 1.7 16 vcc on [v] tj [ c] 150 0 50 50 100 8.9 9 9.1 9.2 8.8 vcc off [v] tj [ c] 150
FA3641p(n), fa3647p(n) 64 cs terminal current (ics) vs. cs terminal voltage (vcs) cs terminal current (ics) vs. cs terminal voltage (vcs) cs terminal charge current (ichg) vs. fb terminal source current (i fb ) vs. junction temperature (tj) fb terminal voltag (v fb ) is (+) terminal current (i is (+) ) vs. is (? terminal current (i is (? ) vs. is (+) terminal voltage (v is (+) ) is (? terminal voltage (v is (? ) FA3641 fa3647 fb = open 2 0 4 6 5 0 5 10 15 10 ics [ a] vcs [v] 8 20 10 12 fb = ov 2 0 4 6 0 10 20 30 40 10 ics [ a] vcs [v] 8 50 10 12 0 50 50 100 9 8 7 6 5 10 ichg [ a] tj [ c] 150 vcc =18v cs = 0v 1 0 2 3 700 600 500 400 300 800 i fb [ a] v fb [v] 4 200 5 100 0 0.5 0 1 1.5 0.3 0.2 0.1 0 0.4 i is (+) [ a] v is (+) [v] 2 2.5 3 0 0.5 1 0.5 1.5 20 15 10 5 0 25 i is ( ) [ a] v is ( ) [v] 2 5 2.5 3
FA3641p(n), fa3647p(n) 65 fig. 1 oscillator fig. 2 oscillator output fig. 3 oscillation frequency description of each circuit 1. oscillator the oscillator generates a triangular waveform by charging and discharging the built-in capacitor. a desired oscillation frequency can be set by the value of the resistor connected to the rt pin (see figure 1). the built-in capacitor voltage oscillates between about 3v and 1v, with almost the same charging and discharging gradients (figure 2). you can set the desired oscillation frequency by changing the gradients using the resistor connected to the rt pin. (large rt = low frequency, small rt = high frequency) the oscillation frequency is automatically lowered when output duty cycle is small (fb about 1.18v) in light load mode. for more information, see item 2, reducing oscillation frequency circuit in light-load mode. the relationship between rt and the fixed oscillation frequency is approximately given by: ..................................................... (1) .......................................... (2) f o : fixed frequency [khz] rt: timing resistance [k ? ] the oscillator waveform cannot be observed from the outside because a pin for this purpose is not provided. the oscillator output is connected to a pwm comparator. the rt pin is 2.5v dc in normal fixed frequency operation mode. when the frequency is lowered, the voltage also decreases linearly to about 1v. 2. reducing oscillation frequency circuit in light-load mode to reduce the loss of the power supply in standby mode, this ic has a feature that automatically lowers the oscillation frequency when the load is light. when the load is light, with the result that the ic output pulse width narrows below about 10% and the fb pin voltage decreases below about 1.18v, the oscillation frequency begins to decreases linearly until the output pulse width becomes 0. when the output pulse width is 0, the oscillation frequency is about 46% of normal fixed frequency (figure 3). even while the oscillation frequency is decreasing, the built-in capacitor voltage oscillates between about 3v and 1v. the frequency reduction rate (46%) can be adjusted from the outside. (see design advice for more information.) 3. pwm comparator the pwm comparator has four inputs as shown in figure 4. oscillator output is compared with cs pin voltage , fb pin voltage , and dt voltage . the lowest of three inputs , , and has priority and is compared with output . while the voltage is lower than the oscillator output, the comparator output is high. while the voltage is higher than the oscillator output, the pwm comparator output is low (see figure 5). the ic out pin voltage is high while the pwm comparator output is low. when the ic is powered up, cs pin voltage controls soft start operation. the output pulse then begins to widen gradually. during normal operation, the output pulse width is determined within the maximum duty cycle (70%) set by dt voltage under the condition set by fb pin voltage , to stabilize the output voltage. fig. 4 pwm comparator fig. 5 pwm comparator timing chart rt [k ? ] 4880 1.4 f 0 f 0 [khz] 4880 rt + 1.4
FA3641p(n), fa3647p(n) 66 fig. 7 cs pin waveform fig. 6 cs pin circuit 4. cs pin circuit as shown in figure 6, capacitor cs is connected to the cs pin. the cs pin voltage varies depending on the charging voltage of this capacitor cs. when the power is turned on, the constant current source (6.5 a) begins to charge capacitor. accordingly, the cs pin voltage rises as shown in figure 7. the cs pin voltage is connected to the pwm comparator, which is characterized to make output based on the lowest of input voltages. the device enters soft-start mode while the cs pin voltage is between 1.0v and 2.4v. during normal operation, the cs pin is clamped at 4.0v by internal zener diode. if the output voltage drops due to an overload and the fb voltage rises to 3v or more, the clamp voltage 4.0v is canceled and the cs pin voltage rises to 9.5v. the cs pin is also connected to latch comparator c2. if the cs pin voltage rises to 8.5v or more, comparator c2 toggles to turn off the 5v ref circuit, thereby shutting the output down. since the cs pin is also connected to comparator c1, the 5v ref circuit can be turned off to shut the output down by dropping the cs pin voltage below 0.68v. in this way, comparator c1 can be used for output on-off control. as explained above, the cs pin can be used for soft-start, overload output shutdown, and output on-off control by varying the voltage. further details on the above three major functions of the cs pin are given below. 4.1 soft start function figure 8 shows the soft start circuit. figure 9 is a soft-start operation timing chart. the cs pin is connected to capacitor cs. when the power is turned on, the constant current source (6.5 a) begins to charge the capacitor. as shown in the timing chart, the cs pin voltage rises slowly in accordance with the capacitor cs charging current. the cs pin is also connected to the ic internal pwm comparator, which has such characteristics that the voltage is determined to output on the basis of the lowest of input voltages. the comparator output pulse slowly widens to cause a soft start as shown in the timing chart. the soft start period can be approximately estimated by the period t s , from the time the ic is activated to the time the output pulse width widens to 30%. the period is given by the following equation: ts [ms] 250 cs ...................................................... (3) cs : soft start capacitor [ f] fig. 8 soft-sart circuit fig. 9 soft-sart timing chart
FA3641p(n), fa3647p(n) 67 fig. 10 overload shutdown circuit 4.2 overload shutdown function figure 10 shows the overload shutdown circuit, and figure 11 is a timing chart that illustrates overload shutdown operation. if the output voltage drops due to an overload or short circuit, the fb pin output voltage rises. if the fb pin voltage exceeds the reference voltage (3.0v) of comparator c3, the output of comparator c3 goes low to turn off the switch. with the switch off, the cs pin voltage clamped at 4.0v by zener diode in normal operation is unclamped, and the constant current source (6.5 a) begins to charge capacitor cs again and the cs pin voltage rises. when the cs pin voltage exceeds the reference voltage (8.5v) of comparator c2, the output of comparator c2 toggles to turn off the 5v ref circuit. the ic then enters the latched mode and shuts down the output. ic current consumption for shutdown is 45 a (typ) (vcc = 10v). this current must be supplied through the startup resistor. the ic enters output off (low voltage) state. the overload shutdown operation can be reset by lowering the supply voltage vcc to below the off threshold voltage (9.0v) or forcing the cs pin voltage below 7.9v. the period t ol from the time the output is short-circuited to the time the output circuit goes off is given by the following equation: t ol [ms] 690 cs .................................................. (4) cs: soft start capacitor [ f] when you want to disable the overload shutdown function, see item 11 in design advice 4.3 output on/off control function the ic can be turned on or off via an external signal applied to the cs pin. figure 12 shows the output on/off control circuit, and figure 13 is a timing chart. the ic is turned off when the cs pin voltage is externally made to drop below 0.68v (typ). the output of comparator c1 goes high to turn the 5v ref circuit. this shuts the output down. the ic enters output off (low voltage) state. required ic current consumption during shutdown is 100 a (typ) (vcc = 17v). this current must be supplied through the startup resistor. the ic goes on when the cs pin is opened and the cs pin voltage exceeds 0.82v (typ). this turns on the 5v ref circuit and results in automatic soft start. the power supply then restarts operation. fig. 11 overload shutdown timing chart fig. 12 external output on/off control circuit fig. 13 output on/off control circuit timing chart
FA3641p(n), fa3647p(n) 68 fig. 14 overcurrent limiting circuit fig. 15 overcurrent timing chart fig. 17 overvoltage shutdown timing chart fig. 16 overvoltage shutdown circuit 5. overcurrent limiting circuit the overcurrent limiting circuit detects the peak value of every drain current pulse (pulse by pulse method) of the main switching mosfet to limit the overcurrent. the detection threshold voltage is +0.235v for FA3641 or 0.168v for fa3647 with respect to the ground as shown in figure 14. the drain current of the mosfet is converted to voltage by resistor rs and fed to the is pin of the ic. if the voltage exceeds the reference voltage +0.235v (FA3641) or 0.168v (fa3647) of comparator c4, comparator c4 works to set flip- flop output q to high. the output is immediately turned off to shut off the current. flip-flop output q is reset on the next cycle to turn on the output again. this operation is repeated to limit the overcurrent. if the overcurrent limiting circuit malfunctions due to noise, place an rc filter between the is pin and mosfet as shown in figure 14. (see item 14 in design advice. ) figure 15 is a timing chart that illustrates overcurrent-limiting operations. 6. vcc overvoltage protection circuit the ic contains a vcc overvoltage protection circuit to protect the ic from damage by overvoltage. figure 16 shows the overvoltage protection circuit. figure 17 is a timing chart that illustrates overvoltage protection operations. overvoltage is detected if the supply voltage vcc rises to 32v (icc = 13ma) or more and current flows in the built-in zener diode. the output of comparator c5 then goes high and the constant current source (0.9ma) raises the cs pin voltage. when the cs pin voltage exceeds 8.5v, the output of comparator c2 goes high to turn off the 5v ref circuit. the ic then enters the latched mode and the ic output is put in the off (low voltage) state. when latched mode, the ic current consumption is 45 a (typ) (vcc = 10v). this current must be supplied through the startup resistor. the overvoltage shutdown operation can be reset by lowering the supply voltage to below 9.0v or forcing the cs pin voltage below 7.9v. (when you want to enable vcc overvoltage shutdown at a desired voltage, see item 7 in design advice.
FA3641p(n), fa3647p(n) 69 fig. 18 oscillator circuit 7. undervoltage lockout circuit (u.v.l.o.) the ic incorporates a circuit that prevents the ic from malfunctioning when the supply voltage drops. when the supply voltage is raised from 0v, the ic starts operation with vcc = 16.5v (typ). if the supply voltage drops, the output is shut down when vcc = 9.0v (typ). when the undervoltage lockout circuit operates, the outputs of the out and cs pins go low to reset the ic. 8. output circuit the ic contains a push-pull output stage and can directly drive the mosfet. the maximum peak current of the output stage is a sink current of 1a and a source current of 0.5a. if the circuit operation stops when the undervoltage lockout circuit operates, the out pin voltage goes low to shut down the mosfet. design advice 1. externally setting the oscillation frequency in the light- load mode as explained in item 2 in description of each circuit, the ic has a function that automatically lowers the oscillation frequency when the load is light, to reduce the loss of the power supply in standby mode. the oscillation frequency goes down to about 46% without adjustment by external circuit. to further lower the frequency to below 46%, connect adjustment resistor rr between the rt and ref pins as shown in figure 18. then the fixed frequency determined by rt also falls. the relationship between the external resistance and oscillation frequency is outlined below: ............................ (5) ....... (6) f o : fixed frequency [khz] fr: minimum frequency in variable mode [khz] rt: timing resistance [k ? ] rr: adjustment resistance [k ? ] select rt and rr so that the relationship between the two satisfies the following: rt < 0.3 rr .................................................................... (7) set the minimum frequency in light-load mode to 10 khz or more. failure to keep the above relationship may disturb the operation. note that the above expressions determine approximate values. note also that the minimum frequency in light-load mode depends on such conditions as the power supply efficiency. therefore, check the operation using a practical circuit to make a final decision. calculation example to set the fixed frequency f o = 100khz and minimum frequency in light-load mode to fr = 20khz, the following can be obtained from expressions (5). rt 37.7 [k ? ]rr 185.1 [k ? ] decrease rr to permit the frequency to vary in a wider range. rt [k ? ] 2.35 3.35a b rr [k ? ] 2.35 a b f 0 [khz] 4880 rtrr + 1.4 rr rt fr [khz] 2500 rtrr + 6 rr 3.35rt a = f 0 4880 1.4f 0 b = f r 2500 6f r
FA3641p(n), fa3647p(n) 70 fig. 19 startup circuit (1) fig. 20 startup circuit (2) 2. deciding the startup circuit these ics, which use cmos process, consume less current, and therefore can use larger startup resistance than the conventional bipolar type of ic. to decide the startup resistance, the following conditions must be satisfied: (a) the ic is started when the power is turned on. (b) the ic consumption current is supplied during latch mode operation to maintain the latch state. (c) the ic consumption current is supplied during the off state under the on/off function to maintain the off state. however, these are the minimum conditions for using the ic. the startup time required for the power supply must also be decided on. 2.1 connecting a startup resistor before rectification (ac line) when the startup resistor is connected before rectification (ac line) as shown in figure 19, the voltage applied to the startup resistor forms a half-wave rectified waveform of the ac input voltage. startup resistor r1 must satisfy the three equations shown below. select a smaller-side value for r1 in consideration of the temperature characteristics. (a) to supply startup current 30 a at on threshold voltage 17.5v (max.) of uvlo: ........................................ (8) (b) to supply ic consumption current 100 a (max.) (vcc =10v) in latch mode: ....................................... (9) (c) to supply ic consumption current 200 a (max.) (vcc =17v) in the off state under the on/off function: ...................................... (10) r1: startup resistance [k ? ] vac: effective value of ac input voltage [v] if neither the latch mode operation nor the on/off functions are used, only the expression in (8) needs to be satisfied. in this method, the supply current to the ic via the start-up resistor is stopped when ac input is shut down. therefore, after latch mode operation, shutting the ac input down resets the latch mode in a very short period of time. 2.2 connecting the startup resistor after rectification (dc line) when the startup resistor is connected after rectification (dc line) as shown in figure 20, the voltage applied to the startup resistor becomes the peak value of the ac input voltage. startup resistor r1 must satisfy the three equations shown below. select a smaller-side value for r1 in consideration of temperature characteristics. (a) to supply startup current 30 a at on threshold voltage 17.5v (max.) of uvlo: .................................. (11) r1 [k ? ] < 2 vac 17.5 0.03 2 vac 17 r1 [k ? ] < 0.2 2 vac 10 r1 [k ? ] < 0.1 2 vac 17.5 r1 [k ? ] < 0.03
FA3641p(n), fa3647p(n) 71 fig. 21 vcc voltage at startup with an adequate capacitor fig. 22 vcc voltage at startup with an inadequate capacitor fig. 23 startup circuit (3) (b) to supply ic consumption current 100 a (max.) (vcc =10v) in latch mode: ................................... (12) (c) to supply ic consumption current 200 a (max.) (vcc = 17v) in the off state under the on/off function: ................................... (13) r1: startup resistance [k ? ] vac: effective value of ac input voltage [v] if neither the latch nor the on/off functions are used, only the expression in (11) needs to be satisfied. in this method, after latch mode operation, smoothing capacitor c1 in the main circuit supplies current to the ic via the startup resistor even if the ac input is shut down. therefore, some time must elapse before the latch mode is reset. 3. determining the vcc capacitor value to properly start the power supply, a certain value is required for the capacitor connected to the vcc pin. figure 21 shows the vcc voltage at start-up when a proper value is given to the capacitor. when the input power is turned on, the capacitor connected to the vcc pin is charged via the startup resistor and the voltage increases. the ic is then in standby state and almost no current is consumed. (icc < 2 a) thereafter, vcc reaches the on threshold voltage of uvlo and the ic begins operation. when the ic begins operation to make output, the ic operates based on the voltage from the auxiliary winding. when the ic is just starting up, however, it takes time for the voltage from the auxiliary winding to rise enough, and vcc drops during this period. determine the vcc capacitor value so that vcc will not drop down to the off threshold voltage of uvlo during this period. if the vcc capacitor value is too small, vcc will drop to the off threshold voltage of uvlo before the auxiliary winding voltage rises enugh. if so, vcc repeatedly goes up and down between the uvlo threshold voltages, and the power supply cannot start up. (figure 22) 4. shortening the startup period increasing the resistance of the startup resistor to reduce loss prolongs the startup period. figure 23 shows a circuit for shortening the startup period. the c2 capacitance is decreased to shorten the startup period and, after the ic starts up, power is supplied from c3. 5. setting soft start period and off latch delay independently figure 24 shows a circuit for setting the soft start period and off latch delay independently. in this circuit, capacitance cs determines the soft start period, and capacitance cl determines the off latch delay. if the overload shutdown or overvoltage shutdown functions raise the cs pin voltage to around 5v, zener diode zn becomes conductive to charge capacitor cl. the off latch delay can be thus prolonged by capacitance cl. fig. 24 independent setting of soft start period and off latch delay when the capacitor value is adequate when the capacitor value is inadequate r1 [k ? ] < 2 vac 10 0.1 r1 [k ? ] < 2 vac 17 0.2
FA3641p(n), fa3647p(n) 72 6. overvoltage protection using the vcc pin these ics contain an overvoltage protection function detecting the vcc voltage using internal zd (see item 6 in description of each circuit ). if vcc voltage exceed about 32v, the current of 13ma flows through the internal zd and the overvoltage protection function operates. after this protection function operates, the ic continues to consume the large current if high voltage continues to be applied to the vcc pin. mind that total ic loss does not exceed the rating. if the voltage source applied to vcc pin has relatively high impedance and cannot supply the current of 13ma, overvoltage protection function does not operate. but the internal zd maintains the vcc voltage 32v or less and protects the ic. 7. overvoltage protection using cs pin these ics contain the overvoltage protection function detecting vcc voltage. however, the threshold voltage is fixed. adding a circuit to cs pin enables the overvoltage protection detecting desired voltage. 7.1 detecting on secondary side figure 25 shows the overvoltage shutdown circuit based on the signal from the secondary side. the optocoupler output transistor is connected between the cs and vcc pins. when the output voltage is put in the overvoltage state, the optocoupler output transistor goes on to raise the cs pin voltage via resistor r2. when the cs pin voltage exceeds the reference voltage (8.5v) of comparator c2, the output of the comparator c2 goes high to turn off the 5v ref circuit. accordingly, the ic enters the off latch mode and shuts the output down. the ic consumes current 45 a (typ) (vcc = 10v) in latch mode. this current must be supplied via startup resistor r1. the overvoltage protection circuit can be reset by lowering the supply voltage vcc to below 9.0v or forcing the cs pin voltage below 7.9v. in normal operation, the cs pin voltage is clamped by the 4v zener diode with maximum sink current 50 a . therefore, to raise the cs pin voltage to 8.5v or more, 50 a or a higher current needs to be supplied from the optocoupler. set the current input to the cs pin to 1ma or less. 7.2 detecting on primary side (detecting vcc voltage) to attain overvoltage protection, the cs pin voltage is forcibly raised from outside the ic until it exceeds the reference voltage (8.5v) of the internal comparator c2. when the reference voltage is exceeded, the ic enters latch mode and shuts the output down. connect a zener diode (zd) and resistor between the vcc and cs pins as shown in figure 26. when the vcc voltage exceeds about zd voltage + 8.5v, the ics enter the off latch mode and shut the output down. if vcc remains high even after shutdown and current is input to the cs pin, set the current to 1ma or lower. set the zener voltage of the zd connected to the cs pin higher than the uvlo on threshold voltage. startup is disabled below this voltage. figure 27 shows another circuit for enabling latch mode shutdown by detecting a desired vcc voltage using the cs pin. in this circuit, overvoltage shutdown works when the vcc voltage is about the same as the zd voltage. for this circuit also, use a zd voltage higher than the uvlo on threshold voltage. set the current flowing into the cs pin to 1ma or lower. fig. 25 overvoltage shutdown circuit (1) fig. 26 overv oltage shutdown circuit (2) fig. 27 overvoltage shutdown circuit (3)
FA3641p(n), fa3647p(n) 73 8. feedback pin circuit figure 28 gives an example of connection in which a feedback signal is input to the fb pin. if this circuit causes power supply instability, connect r3 and c4 as shown in figure 28 to decrease the frequency gain. set r3 between several tens of ohms to several kilohms and c4 between several thousand picofarads to one microfarad. be especially careful in light load mode, in which the frequency drops, thereby increasing the probability of power supply instability being triggered. 9. ref characteristics if noise is applied to the vcc pin from the outside, it may appear at the ref pin without attenuation depending on the noise frequency. the noise causes no problems in normal ic operation, but must be taken into consideration when the ref voltage is used for an external circuit. if the noise appearing at the ref pin causes any problems, use the ref pin as shown in figure 29. 10. simple voltage control on the primary side in a flyback type power supply, the output voltages of the power supply and auxiliary winding are almost proportional to the number of winding turns of the transformer. this characteristic can be used in the circuit shown in figure 30, where the output voltage can easily be made constant by detecting the voltage of the auxiliary winding voltage. however, this is an easy output voltage control method, and the output voltage precision and regulation are therefore not as good. to reduce output pulse width completely to 0%, the fb pin voltage must fall below 0.95v and r5 must be set below about 960 ? from the characteristics of the fb pin voltage and source current. when using this method, also keep in mind the characteristics of ref in item 9. 11. disabling the overload shutdown function as shown in figure 31, connect a 8.2k ? resistor r6 between the fb pin and the ground. the fb pin voltage then does not rise sufficiently high to reach the shutdown threshold voltage when an overload occurs so that ic does not enter off latch mode. even with this connection, the overvoltage shutdown function is available. since resistor r6 limits the upper voltage of the fb pin, the maximum duty cycle may be limited to about 65%, if a 5% precision resistor is used. to not limit the maximum duty cycle, use a 2% or better-precision resistor for r6. 12. polarities for overcurrent detecting and their characteristics the FA3641 uses positive polarity detection for overcurrent limiting (number 3 pin of is pin) and the fa3647 uses negative polarity detection. the characteristics of positive and negative polarity detection are summarized below. select one in accordance with the circuit used. (see item 5 in description of each circuit. ) positive detection (FA3641) wiring is easy because the ground can be shared by the main circuit and ic peripherals. it is easy to correct the overload detecting current, which is used to detect overload, against the input voltage. negative detection (fa3647) the mosfet drive current does not flow to the current detection resistor and therefore it hardly affects overcurrent detection. fig. 30 simple voltage control circuit fig. 31 disabling overload shutdown function fig. 28 fb pin circuit fig. 29 ref pin circuit
FA3641p(n), fa3647p(n) 74 13. correcting overload detection current (FA3641 only) if the power supply output is overloaded, the ic overcurrent limiting function restricts the output power and the overload shutdown function stops the ic. the output current when an overload occurs varies depending on the input voltage; the higher the input voltage, the more the overload detection current may increase. if any problems occur as a result of the appearance of this symptom, connect resistor r8 between current detection resistor rs and the is (+) pin and add resistor r7 for correction as shown in figure 32. the standard resistance of r8 is several hundred ohms, and that of r7 is from several hundred kilohms to several megohms. note that the above correction slightly lowers the output current when overload even where the input voltage is low. this correction is available only for the FA3641 that uses positive polarity for overcurrent detection. 14. preventing malfunction caused by noise the is pin for overcurrent limiting function detects the mosfet current converted to the voltage. the parasitic capacitor and inductor of the mosfet, transformer, wiring, etc. cause a noise in switching operation. if this switching noise causes a malfunction of overcurrent limitimg function, insert the rc filter into is pin as shown in figure 14. also, connect a noise prevention capacitor (0.1 f or more) to the ref pin that outputs the reference voltage for each component. 15. preventing malfunction caused by negative voltage applied to a pin when large negative voltage is applied to each ic pin, a parasitic element in the ic may operate and cause malfunction. be careful not to allow the voltage applied to each pin to drop below 0.3v. especially for the out pin, voltage oscillation caused after the mosfet turns off may be applied to the out pin via the parasitic capacitance of the mosfet, causing the negative voltage to be applied to the out pin. if the voltage falls below 0.3v, add a schottky diode between the out pin and the ground. the forward voltage of the schottky diode can suppress the voltage applied to the out pin. use the low forward voltage of the schottky diode. similarly, be careful not to cause the voltages at other pins to fall below 0.3v. 16. gate circuit configuration to adjust switching speeds or prevent oscillation at gate terminals, resistors are normally inserted between the power mosfet gate terminal to be driven and the out pin of the ic. you may prefer to decide on the drive current independently, to turn the mosfet on and off. if so, connect the mosfet gate terminal to the out pin of the ic as shown in figure 34. in the circuit shown in figure 34, rg1 and rg2 restrict the current when the mosfet is turned on, and only rg1 restricts the current when it is turned off. fig. 33 protection of out pin against the negative voltage fig. 32 correcting overload detecting current circuit fig. 34 gate circuit
FA3641p(n), fa3647p(n) 75 17. loss calculation ic loss must be confirmed to use the ic within the ratings. since it is hard to directly measure ic loss, some examples of calculating approximate ic loss are given below. 17.1 calculation example 1 suppose the supply voltage is vcc, ic current consumption is lccop, the total gate charge of the power mosfet is qg, and the switching frequency is f sw . total ic loss pd can be calculated by: pd = vcc (iccop + qg fsw) ................................ (14) this expression calculates an approximate value of pd, which is normally a little larger than the actual loss. since various conditions such as temperature characteristics apply, thoroughly verify the appropriateness of the calculation under all applicable conditions. example: when vcc = 18v, lccop = 2.5ma (max.) is obtained from the specifications. suppose qg = 80nc and fsw = 100khz. 17.2 calculation example 2 the ic loss consists of the loss caused by operation of the control circuit and the loss caused at the output circuit to drive the power mosfet. (1) loss at the control circuit the loss caused by operation of the ic control circuit is calculated by the supply voltage and ic current consumption. when the supply voltage is vcc and ic current consumption is lccop, loss pop at the control circuit is: pop = vcc iccop ....................................................... (15) example: when vcc = 18, lccop = 1.9ma (typ) is obtained from the specifications. the typical ic loss is given by: pop = 18v 1.9ma = 34.2mw (2) loss at the output circuit the output circuit of the ic is a mosfet push-pull circuit. when the on resistances of mosfets making up the output circuit are ron and roff, the resistances can be determined as shown below based on vcc = 18v and tj = 25 ? c obtained from the output characteristics included in the specifications: ron = 15 ? (typ) roff = 7 ? (typ) when the total gate charge of the power mosfet is qg, the switching frequency is f sw , the supply voltage is vcc, and gate resistance is rg, the loss caused at the ic output circuit is given by: ....... (16) fig. 35 output stage pd 18v (2.5ma + 80nc 100khz) = 189mw pdr = 1 vcc qg fsw ron roff 2 rg ron rg roff ()
FA3641p(n), fa3647p(n) 76 fig. 36 gate circuit when gate resistance differs between on and off as shown in figure 36, the loss is given by: ... (17) example: when vcc = 18v, qg = 80nc, fsw = 100khz, and rg = 10 ? , the typical ic loss is given by: (3) total loss the total loss (pd) of the ic is the sum of the control circuit loss (pop) and the output circuit loss (pdr) calculated previously: pd = pop + pdr .............................................................. (18) example: the standard ic loss under the conditions used in (1) and (2) above are: pd = pop + pdr = 34.2mw + 72.8mw = 107mw pdr = 1 vcc qg fsw ron roff 2 rg1 rg2 ron rg1 roff () pdr = 1 18v 80nc 100khz 15 ? 7 ? 210 ? 15 ? 10 ? 7 ? =72.8mw ()
FA3641p(n), fa3647p(n) 77 application circuit FA3641 parts tolerances characteristics are not defined in the circuit design sample shown above. when designing an actual circuit for a product, you must determine parts tolerances and characteristics for safe and economical operation. fa3647
FA3641p(n), fa3647p(n) 78 electrical characteristics of application circuit input power vs. input voltage input power vs. output power oscillation frequency vs. output power 50 0 100 150 0.1 0.2 0.3 0.4 0.5 0 input power [w] input voltage [vac] 200 0.6 250 300 condition:no-load 0.1 0.01 1 10 1 0.1 10 input power [w] output power [w] 230v ac 100v ac 10 0 30 20 40 20 30 40 50 60 10 oscillation frequency [khz] output power [w] 50 70 60 80 90 0 100v ac 230v ac

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